| 摘要 |
The present invention relates to a word line decoder in a NAND type flash memory device. The word line decoder in a NAND type flash memory device that decodes a word line select signal by which a given memory cell is selected comprises a row decoder for receiving an address of the given memory cell to produce a signal informing that the given memory cell is selected or not selected, a control unit for outputting a positive voltage if the signal that the given memory cell was selected from the row decoder and for outputting a negative voltage if the given memory cell was not selected, and a driving unit having NMOS transistors for outputting the negative voltage inputted to sources of the NMOS transistors to drains of the NMOS transistors if the positive voltage outputted from the control unit is applied to gates of the NMOS transistors and for prohibiting the negative voltage inputted to the sources from being outputted to the drains if the negative voltage outputted from the control unit is applied to the gates of the NMOS transistors, wherein the negative voltage inputted to the sources of the NMOS transistors is applied to a P well of the NMOS transistors.
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