发明名称 SEMICONDUCTOR INTEGRATED-CIRCUIT TESTING APPARATUS
摘要 PROBLEM TO BE SOLVED: To grasp precise position on a test program when a warning is generated. SOLUTION: A semiconductor integrated-circuit testing apparatus for testing a device under test on the basis of the test program is provided with an execution-position storage means 2c1 used to sequentially update and store an execution position on the test program, a warning control unit 2e used to output the execution position stored in the storage means 2c1 as a warning position, and a display device 4 used to display the warning position to be input from the control unit 2e. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003329728(A) 申请公布日期 2003.11.19
申请号 JP20020134325 申请日期 2002.05.09
申请人 ANDO ELECTRIC CO LTD 发明人 UCHIYAMA HIROTO
分类号 G01R31/28;(IPC1-7):G01R31/28 主分类号 G01R31/28
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