发明名称 METHOD AND APPARATUS FOR TESTING SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a testing method and a testing device by which a logic test and a DC test of a semiconductor integrated circuit device can be carried out without using an expensive tester. SOLUTION: A test circuit is formed by sending a test circuit forming data for each test item to a first semiconductor integrated circuit (100) provided with a plurality of variable logic cells (VLC) which enable forming of an arbitrary logic, and a plurality of analog circuit cells (DACB) which output analog signals or a plurality of circuit cells (CCB) which are capable of forming an arbitrary logic and outputting analog signals, and variable connecting means (SMX, CSW) for connecting the cells to each other arbitrarily. Using the test circuit, a second semiconductor integrated circuit (DUT) being a testing object is tested. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003329743(A) 申请公布日期 2003.11.19
申请号 JP20020137986 申请日期 2002.05.14
申请人 RENESAS TECHNOLOGY CORP 发明人 SATO MASAYUKI;KURITA HIROSHI
分类号 G01R31/316;H01L21/82;H01L21/822;H01L27/04;H03K19/00;(IPC1-7):G01R31/316 主分类号 G01R31/316
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