发明名称 Method for fabricating and identifying integrated circuits and self-identifying integrated circuits
摘要 Two types of topologically different three-dimensional integrated circuits (for example a 4-layer three-dimensional memory array and an 8-layer three-dimensional memory array) are fabricated from a single set of photolithographic masks. In one example, masks 1-5 are used along with other masks to create the first four levels of memory cells in both a 4-layer memory array and an 8-layer memory array. The 8-layer memory array is completed with masks used to form the top four layers of the array. An integrated circuit identification circuit generates an appropriate circuit identification signal for both types of integrated circuits by sensing whether a conductive path across some or all of the device levels of the integrated circuit is continuous, and then by selecting the appropriate circuit identification signal.
申请公布号 US6649505(B2) 申请公布日期 2003.11.18
申请号 US20020068195 申请日期 2002.02.04
申请人 MATRIX SEMICONDUCTOR, INC. 发明人 VYVODA MICHAEL A.;CROWLEY MATTHEW P.
分类号 G11C5/00;H01L21/822;(IPC1-7):H01L21/44 主分类号 G11C5/00
代理机构 代理人
主权项
地址