Direct transformation of engineering change orders to synthesized IC chip designs

摘要

A change, such as an ECO, is transformed to a gate-level netlist. The change is incorporated in cells of a synthesizable source design. A domain is defined in the netlist that contains cells that are equivalent to the cells of the source design that incorporate the change. The cells of the synthesizable source design that incorporate the change are substituted for the domain in the netlist. The substituted synthesizable source design domain is resynthesized into the gate-level netlist that includes the change.