Ferroelectric memory device and method of fabricating the same

摘要

A ferroelectric memory device and a method of fabricating the same are disclosed. Four interlayer dielectric layers are stacked on cell array and peripheral circuit regions on a semiconductor substrate. A gate contact pad and a source/drain contact pad are connected to a gate electrode and a source/drain of the peripheral circuit transistor through the first interlayer dielectric layer. A gate contact plug and a source/drain contact plug are respectively connected to the gate contact pad and the source/drain contact pad through the second interlayer dielectric layer. First via holes expose the gate contact plug and the source contact plug through the third interlayer dielectric layer. A first interconnection extends between the third and fourth interlayer dielectric layers, covering the sidewalls of the first via holes and connected to at least one of the gate contact plug and the source/drain contact plug.