发明名称 DIFFERENTIAL CURRENT EVALUATION CIRCUIT FOR EVALUATING MEMORY STATE OF SRAM SEMICONDUCTOR MEMORY CELL, AND SENSE AMPLIFIER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To improve circuit structure for reading and evaluating the memory state in a semiconductor memory cell. SOLUTION: A differential current evaluation circuit (SBS) is provided with input section resistance adjusting means (MIN, MINB) of a differential amplifier (DV) and a current evaluation circuit (SBS). These means (MIN, MINB) are connected to the output parts (outp, outn) and the input parts (inn, inp) of the differential amplifier (DV) and signal lines (BL, BLB), which are electrically connected also to the input parts (inn, inp) of the differential amplifier (DV). A sense amplifier circuit (LV) is provided with a circuit part (ST2). The differential current evaluation circuit (SBS) and the sense amplifier circuit (LV) are arranged in circuit structure for reading and evaluating the memory state of a semiconductor memory cell. A current evaluation circuit is activated, before a reading process and automatically inactivated, immediately after finishing the reading process by a circuit (STAD) for automatic inactivation. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003323800(A) 申请公布日期 2003.11.14
申请号 JP20030127195 申请日期 2003.05.02
申请人 INFINEON TECHNOLOGIES AG 发明人 WICHT BERNHARD;SCHMITT-LANDSIEDEL DORIS;LARGUIER YEAN-YVES
分类号 G11C7/06;G11C11/413;G11C11/419;G11C29/12;(IPC1-7):G11C29/00 主分类号 G11C7/06
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