发明名称 |
Method of etching a trench in a silicon-on-insulator (SOI) structure |
摘要 |
Disclosed herein is a method of etching a trench in silicon overlying a dielectric material which reduces or substantially eliminates notching at the base of the trench, while reducing scalloping on the sidewalls of the trench. The method comprises etching a first portion of a trench by exposing a silicon substrate, through a patterned masking layer, to a plasma generated from a fluorine-containing gas. This etching is followed by a polymer deposition step comprising exposing the substrate to a plasma generated from a gas which is capable of forming a polymer on etched silicon surfaces. The etching and polymer deposition steps are repeated for a number of cycles, depending on the desired depth of the first portion of the trench. The final portion of the trench is etched by exposing the silicon to a plasma generated from a combination of a fluorine-containing gas and a polymer-forming gas.
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申请公布号 |
US2003211753(A1) |
申请公布日期 |
2003.11.13 |
申请号 |
US20020143269 |
申请日期 |
2002.05.09 |
申请人 |
NALLAN PADMAPANI C.;KUMAR AJAY;KHAN ANISUL H.;YANG CHAN-SYUN DAVID |
发明人 |
NALLAN PADMAPANI C.;KUMAR AJAY;KHAN ANISUL H.;YANG CHAN-SYUN DAVID |
分类号 |
C03C25/68;H01L21/00;H01L21/302;H01L21/3065;H01L21/461;(IPC1-7):H01L21/461 |
主分类号 |
C03C25/68 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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