| 摘要 |
The invention relates to an integrated circuit (IC) comprising a circuit (DEVICE) having an offset voltage (VOS/VOFF) and designed for receiving an input voltage (VIN), and calibration means (CAL) of said circuit (DEVICE) for correcting the offset voltage (VOS/VOFF). It is characterized in that the calibration means (CAL) comprise: - interruption means (SWITCH) for short-circuiting the input voltage (VIN) of a circuit (DEVICE), - detection means (COMP) for detecting the sign (S SIGN) of the offset voltage VOS/VOFF), - definition means (SAR) for defining a digital correction signal defined by successive steps (S MOT) as a function of the sign (S SIGN) of the offset voltage (VOS/VOFF), and - correction means (D/A) for correcting the offset voltage (VOS/VOFF) as a function of the digital correction signal (S MOT).
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