Internal power voltage generating circuit of semiconductor memory device and internal power voltage controlling method thereof

摘要

An internal power voltage generating circuit of a semiconductor memory device for decreasing electric power consumption during a long cycle operation and for minimizing an internal power voltage drop caused by peak current consumption during a short cycle operation preferably includes a reference voltage generator for generating reference voltages, a pulse generator for generating an address shift detecting signal in response to a control signal, and at least one driver stage for generating an internal power voltage in response to a normal enable signal and the address shift detecting signal. A method for controlling an internal power voltage generator preferably includes preparing current sinks as a plurality of current sink paths to operate the driver stage that generates the internal power voltage and controlling one current sink path out of the plurality of current sink paths with an active operation-detecting signal.