发明名称 Multiple thickness semiconductor interconnect and method therefor
摘要 A conductive line varies in thickness to assist in overcoming RC delays and noise coupling. By varying line thickness, variation in conductor width is avoided if necessary to maintain a specified minimum pitch between conductors while maintaining predetermined desired RC parameters and noise characteristics of the conductive line. Conductor depth variation is achieved by etching a dielectric layer to different thicknesses. A subsequent conductive fill over the dielectric layer and in the differing thicknesses results in a conductive line that varies in thickness. Different conductive line thicknesses available at a particular metal level can additionally be used for semiconductor structures other than a signal or a power supply conductive line, such as a contact, a via or an electrode of a device. The thickness analysis required to determine how interconnect thickness is varied in order to meet a desired design criteria may be automated and provided as a CAD tool.
申请公布号 US2003209779(A1) 申请公布日期 2003.11.13
申请号 US20020141714 申请日期 2002.05.09
申请人 YU KATHLEEN C.;STROZEWSKI KIRK J.;FARKAS JANOS;SANCHEZ HECTOR;LII YEONG-JYH T. 发明人 YU KATHLEEN C.;STROZEWSKI KIRK J.;FARKAS JANOS;SANCHEZ HECTOR;LII YEONG-JYH T.
分类号 H01L21/3205;H01L21/768;H01L23/52;H01L23/528;(IPC1-7):H01L29/00;H01L23/48 主分类号 H01L21/3205
代理机构 代理人
主权项
地址