发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p>A MOS circuit in which a channel leakage current decreasing in inverse proportion to a substrate bias voltage and a junction leakage current increasing in proportion to the substrate bias voltage occur has an active mode in which the MOS circuit carries out a desired circuit operation and a standby mode in which the MOS circuit stops the circuit operation. A substrate bias circuit generates a substrate bias voltage and supplies it to the MOS circuit so that the region may be one where the total leakage current of the channel leakage current and the junction leakage current is a minimum in the standby mode.</p>
申请公布号 WO2003094235(P1) 申请公布日期 2003.11.13
申请号 JP2002004323 申请日期 2002.04.30
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