发明名称 Power management for an integrated graphics device
摘要 In one embodiment of the invention, an integrated device is described that employs a mechanism to control power consumption of a graphics memory controller hub (GMCH) through both voltage and frequency adjustment of clock signal received from a clock generator. The GMCH comprises a graphics core and a circuit to alter operational behavior, such as the frequency of a render clock signal supplied to the graphics core. The circuit is adapted to monitor idleness of the graphics core and reduce a frequency level of the render clock signal if the idleness exceeds a determined percentage of time.
申请公布号 US2003210247(A1) 申请公布日期 2003.11.13
申请号 US20020143406 申请日期 2002.05.09
申请人 CUI YING;SAMSON ERIC C.;BERKOVITS ARIEL;NAVALE ADITYA;WYATT DAVID A.;CLINE LESLIE E.;TSANG JOSEPH W.;BLAKE MARK A.;POISNER DAVID I.;STEVENS WILLIAM A.;SAR-DESSAI VIJAY R. 发明人 CUI YING;SAMSON ERIC C.;BERKOVITS ARIEL;NAVALE ADITYA;WYATT DAVID A.;CLINE LESLIE E.;TSANG JOSEPH W.;BLAKE MARK A.;POISNER DAVID I.;STEVENS WILLIAM A.;SAR-DESSAI VIJAY R.
分类号 G06F1/04;G06F1/32;(IPC1-7):G06F1/04;G06F1/06;G06F1/08;G09G5/39;G06F13/372 主分类号 G06F1/04
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