发明名称 Microcomputer with re-initialization of DRAM or SRAM using non-volatile memory
摘要 The microcomputer comprises: a CPU, a DRAM installed within the microcomputer, a non-volatile memory storing a program data therein, an interface commonly used among various circuits within the microcomputer, a system clock generating circuit, which generates clock signals, and is also capable of suspending and regenerating the clock signals, respectively in response to a system clock stop signal and a system clock generation signal, a peripheral circuit which is capable of outputting an interrupt signal requesting the system clock generation to the CPU, and a control circuit which re-transmits the program data from the non-volatile memory to the DRAM in response to a re-initialize request signal output from the CPU, and also outputs an access prohibition, signal for prohibiting the access to the data stored in the DRAM and an access prohibition release signal for releasing the prohibition of access. Due to this construction, it no longer requires two clock generating circuits; namely a clock generating circuit one for the system and that exclusively used for the DRAM, and thus the function and the level of integration of the microcomputer are not degraded.
申请公布号 US6647503(B1) 申请公布日期 2003.11.11
申请号 US20000639067 申请日期 2000.08.16
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 KURODA SACHIE
分类号 G06F15/78;G06F1/24;G06F1/32;G06F9/445;(IPC1-7):G06F1/13 主分类号 G06F15/78
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