发明名称 Reconfigurable datapath for processor debug functions
摘要 A reconfigurable datapath (13b), which may be alternatively configured for various debug modes. These modes include a breakpoint mode (20), counter mode (30a-30c), DMA mode (40), and PSA mode (50). Each configuration uses one or more of two bitcell units: a register bitcell unit (60) and a comparator bitcell unit (70). The inputs and interconnections of these bitcell units (60, 70) determine the configuration, and hence the mode, for which they are to be used.
申请公布号 US6647511(B1) 申请公布日期 2003.11.11
申请号 US19990379769 申请日期 1999.08.24
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 SWOBODA GARY L.;KARTHIKEYAN MADATHIL R.;MENON AMITABH;MATT DAVID R.
分类号 G06F11/36;(IPC1-7):G06F11/00 主分类号 G06F11/36
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