发明名称 Apparatus and method for viterbi decoding
摘要 The path temporary storage unit 101 stores path select signals outputted from the ACS means 100 over a certain period of time. The partial trace back unit 102 performs a partial trace back between the first time point and the second time point by using the path select signals stored in the path temporary storage unit 101, and detects a non-passing node through which surviving paths do not pass at the second time point. The conversion unit 103 receives the signals from the partial trace back unit 102, and converts the path select signal corresponding to the non-passing node into a predetermined fixed value. This decreases the probability of occurrence of a signal transition in the path memory 104, thereby reducing power consumption.
申请公布号 US6647530(B1) 申请公布日期 2003.11.11
申请号 US20000719434 申请日期 2000.12.12
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 KAMADA TAKEHIRO
分类号 H03M13/41;(IPC1-7):H03M13/41;H03M13/25 主分类号 H03M13/41
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