发明名称 System and method utilizing speculative cache access for improved performance
摘要 A system and method are disclosed which provide a cache structure that allows early access to the cache structure's data. A cache design is disclosed that, in response to receiving a memory access request, begins an access to a cache level's data before a determination has been made as to whether a true hit has been achieved for such cache level. That is, a cache design is disclosed that enables cache data to be speculatively accessed before a determination is made as to whether a memory address required to satisfy a received memory access request is truly present in the cache. In a preferred embodiment, the cache is implemented to make a determination as to whether a memory address required to satisfy a received memory access request is truly present in the cache structure (i.e., whether a "true" cache hit is achieved). Although, such a determination is not made before the cache data begins to be accessed. Rather, in a preferred embodiment, a determination of whether a true cache hit is achieved in the cache structure is performed in parallel with the access of the cache structure's data. Therefore, a preferred embodiment implements a parallel path by beginning the cache data access while a determination is being made as to whether a true cache hit has been achieved. Thus, the cache data is retrieved early from the cache structure and is available in a timely manner for use by a requesting execution unit.
申请公布号 US6647464(B2) 申请公布日期 2003.11.11
申请号 US20000507546 申请日期 2000.02.18
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 RIEDLINGER REID JAMES;MULLA DEAN A.;GRUTKOWSKI TOM
分类号 G06F12/08;(IPC1-7):G06F12/00 主分类号 G06F12/08
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