发明名称 |
Circuit design technique for increasing the bandwidth of sample-and-hold circuits in flash ADCs |
摘要 |
An analog-to-digital converter to convert an analog signal to a digital signal, including a sample-and-hold circuit to sample and hold the analog signal and to output a held signal, a buffer circuit to buffer the held signal to output a buffered signal, and a comparator circuit to compare the buffered signal with a reference voltage.
|
申请公布号 |
US6646584(B2) |
申请公布日期 |
2003.11.11 |
申请号 |
US20010992904 |
申请日期 |
2001.11.14 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
NAGARAJ KRISHNASAWAMY;MARTIN DAVID A. |
分类号 |
H03K5/24;H03M1/36;(IPC1-7):H03M1/12 |
主分类号 |
H03K5/24 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|