发明名称 METHOD FOR PERFORMING ACCESS OPERATION IN SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY ARRAY AND INTEGRATED CIRCUIT DEVICE INCLUDING CIRCUIT FOR CONTROLLING COLUMN SELECTING SIGNAL
摘要 PROBLEM TO BE SOLVED: To provide automatic delay technique for early read and write memory access operation in integrated circuit elements using a synchronous dynamic random access memory (SDRAM) elements and an incorporated SDRAM array. SOLUTION: A circuit and method for controlling internal column selection ('Yi') and a data signal is provided. A column address strobe ('/CAS') signal can be made (active) earlier than the case in which conventional SDRAM array is used. In one embodiment, a column selection signal ('read' or 'write') is delayed until a signal generated after is made valid out of a corresponding pre-decoded column address signal or respective column clock signals. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003317475(A) 申请公布日期 2003.11.07
申请号 JP20020257793 申请日期 2002.09.03
申请人 UNITED MEMORIES INC;SONY CORP 发明人 PARRIS MICHAEL C;KIM C HARDY;OSCAR FREDERICK JONES JR
分类号 G11C11/407;G11C7/10;G11C11/408;(IPC1-7):G11C11/407 主分类号 G11C11/407
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