发明名称 Method for forming polysilicon connected deep trench dram cell
摘要 A method for forming polysilicon connected deep trench DRAM cell. The method at least includes the following steps. First of all, a substrate is provided. Then, a buried plate drives in the substrate. Then, a capacitor dielectric layer is formed to fill into a lower portion of the deep trench. Next, a dielectric collar layer is formed on a sidewall of the deep trench about the capacitor dielectric layer. Then, a selective growth polysilicon layer is formed to fill into the deep trench of the opening. Then, the shallow trench isolation structure is formed in sidewall of the deep trench. Next, a metal-oxide-semiconductor transistor is formed on the substrate. Next, a spacer is formed on sidewall of the metal-oxide semiconductor transistor. Finally, a polysilicon layer is formed on the metal-oxide-semiconductor transistor.
申请公布号 US2003207531(A1) 申请公布日期 2003.11.06
申请号 US20020135730 申请日期 2002.05.01
申请人 LIN TA-CHENG 发明人 LIN TA-CHENG
分类号 H01L21/8242;(IPC1-7):H01L21/824;H01L21/20 主分类号 H01L21/8242
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