发明名称 |
Passivation integrity improvements |
摘要 |
An exemplary implementation of the invention is a process for forming passivation protection on a semiconductor assembly by the steps of: forming a layer of oxide over patterned metal lines having sidewalls; forming a first passivation layer of silicon nitride over the layer of oxide such that the first passivation layer of silicon nitride resides along the sidewalls of metal lines and pinches off a gap between the metal lines; performing a facet etch to remove material from the edges of the first passivation layer of silicon nitride and re-deposits some of removed material across a pinch-off junction; forming a second passivation layer of silicon nitride on the first passivation layer of silicon nitride. |
申请公布号 |
US2003205782(A1) |
申请公布日期 |
2003.11.06 |
申请号 |
US20030411171 |
申请日期 |
2003.04.09 |
申请人 |
IRELAND PHILIP J.;GREEN JAMES E. |
发明人 |
IRELAND PHILIP J.;GREEN JAMES E. |
分类号 |
H01L21/768;H01L23/00;H01L23/31;(IPC1-7):H01L29/06 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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