| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an analytical method for a scan test circuit in which a flip-flop having a nonconformity in a shift operation in a flip-flop chain of the scan test circuit is specified in a short time even without using a special analyzer such as an EB tester or the like. <P>SOLUTION: A power-supply voltage (VDD) is changed (from 1.8 V to 2.2 V) only in a shift operation of a designated flip-flop, a flip-flop to be designated is changed, the shift operation is tested repeatedly, a hold margin (HM21) is eliminated on the basis of a fact that an output timing of shift data from a final-stage flip-flop becomes earlier than that in a normal operation, and a flip-flop (FFn) generating a shift error is specified. <P>COPYRIGHT: (C)2004,JPO |
