发明名称 DIGITAL SIGNAL ENCODING DEVICE, DIGITAL SIGNAL DECODING DEVICE, DIGITAL SIGNAL ARITHMETIC ENCODING METHOD, AND DIGITAL SIGNAL ARITHMETIC DECODING METHOD
摘要 <p>In a bit stream syntax of sliced video compressed data which is video compressed data having a sliced structure, each sliced video compressed data has a slice header of each sliced video compressed data, the header multiplexing: a slice start code, a register reset flag indicating whether to reset a register value indicating the code word state of an arithmetic encoding process in the next transmission unit, the initial register value which is a register value at that moment so as to be used as a register value upon start of arithmetic encoding and decoding of the next transmission unit if the register reset flag indicates “not to perform reset”.</p>
申请公布号 WO2003092168(P1) 申请公布日期 2003.11.06
申请号 JP2003004578 申请日期 2003.04.10
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