发明名称 Apparatus and method to facilitate hierarchical netlist checking
摘要 An apparatus and method are disclosed which determine locations where verification data should exist in a circuit representation and then propagates verification or circuit properties within a circuit representation. For a hierarchical representation of a circuit, a minimum number of modified circuit entities are created and added to the hierarchical representation such that pertinent critical net and property information is represented at each hierarchical level.
申请公布号 US2003208721(A1) 申请公布日期 2003.11.06
申请号 US20020122381 申请日期 2002.04.16
申请人 REGNIER JOHN W. 发明人 REGNIER JOHN W.
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
代理机构 代理人
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