Cache lock device and method therefor

摘要

A cache lock device eliminates the need of transferring data to a cache at execution of a lock instruction by excluding the possibility of an invalid data to be locked in the cache. The cache lock device has a least recently used (LRC) output conversion circuit which converts a value of an LRU output to make a second entry an object of rewriting when a lock bit of the second entry is active and a comparison result of a tag value is in agreement and a valid bit is inactive. Therefore, a user or programmer can set a specified data in the locked entry defined by a Tag address and an Index address without setting the specified data in the entry before the lock bit is made active.