发明名称 Long setup flip-flop for improved synchronization capabilities
摘要 A device and method for improving the synchronization and metastability resolving capabilities of a flip flop. At least one master latch resolves a metastable condition of a received data signal thereby generating a stable data signal which is received and then displayed by a slave latch. Latches with superior metastability time resolution are configured in a master-slave relationship along with a novel clocking scheme whereby the clock signal supplied to the master latch is inverted as compared to that which is supplied to slave latch. As a result, the input data is latched on a falling edge of a clock signal and subsequently displayed on the rising edge of the clock signal providing at one half cycle for the input data to settle before passing out the data thereby allowing metastabilities to resolve during that period.
申请公布号 US6642763(B2) 申请公布日期 2003.11.04
申请号 US20010034081 申请日期 2001.12.19
申请人 INTEL CORPORATION 发明人 DIKE CHARLES E.
分类号 H03K3/037;H03K3/356;H03K3/3562;(IPC1-7):H03K3/289 主分类号 H03K3/037
代理机构 代理人
主权项
地址