| 摘要 |
A clock signal generation apparatus includes a first device for extracting reference information from an input digital signal. A first oscillator generates a reference clock signal having a frequency depending on a control signal. A second oscillator generates a basic signal having a fixed frequency. A first circuit loop operates for generating a first error signal in response to the reference clock signal and the extracted reference information, and for feeding the first error signal in response to the reference clock signal and the control signal. A second device operates for enabling one of the first circuit loop and the second circuit loop and disabling the other.
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