发明名称 |
Software parameterizable control blocks for use in physical layer processing |
摘要 |
<p>A physical layer transport composite processing system used in a wireless communication system. A plurality of interconnected processing blocks are provided. The blocks are interconnected by a read data bus, a write data bus and a control bus. The blocks include a transport channel processing block (305,307), a composite channel processing block (303,309) and a chip rate processing block (301,311). At least two of the blocks are capable of processing data for a plurality of wireless formats. A first set of parameters is programmed into the blocks for a particular wireless mode. The blocks are operated to process data in the particular wireless format mode.</p> |
申请公布号 |
AU2003223595(A8) |
申请公布日期 |
2003.11.03 |
申请号 |
AU20030223595 |
申请日期 |
2003.04.15 |
申请人 |
INTERDIGITAL TECHNOLOGY CORPORATION |
发明人 |
DAVID S. BASS;GEORGE W. MCCLELLAN;EDWARD L. HEPLER;ALAN M. LEVI;DOUGLAS R. CASTOR;MICHAEL F. STARSINIC;BINISH DESAI |
分类号 |
H04J1/00;H04B1/40;H04B1/707;H04B7/26;H04J3/00;H04J4/00;H04L1/00;H04L1/08;H04L12/56;H04W28/18;H04W74/02;H04W80/00;H04W88/02;(IPC1-7):H04J4/00 |
主分类号 |
H04J1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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