| 摘要 |
Various bus lines are disposed in the same layer as the layer of the pixel electrode. The peripheral driving circuit is configured by using a layer below the pixel electrode, including the layer of the gate electrode, the data line and the active layer of a TFT. The HVDD bus line is superimposed on the H scanner, the VSS bus line on the HSW circuit and the V scanner, the pre-charge data bus line on the PSW circuit, and the VVDD bus line on the V scanner. This increases the flexibility of the disposition of the bus lines for supplying the source voltages to the peripheral driving circuit, leading to the reduction of the framing area.
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