发明名称 |
On-chip reset circuitry and method |
摘要 |
An integrated circuit includes an external reset input, a clock input for receiving a clock signal and a reset signal sub-circuit including an internal reset output connected to other circuits of the integrated circuit. The reset signal sub-circuit immediately supplies an internal reset signal upon receipt of the external reset signal and ceases to supply the internal reset signal upon a next clock signal following ceasing to receive the external reset signal. This asynchronously forces combinational logic to a reset state upon receipt of the internal reset signal and synchronously forces sequential logic to a reset state upon receipt of a next clock signal.
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申请公布号 |
US2003204713(A1) |
申请公布日期 |
2003.10.30 |
申请号 |
US20030422275 |
申请日期 |
2003.04.24 |
申请人 |
HALES ALAN D.;HILL ANTHONY M. |
发明人 |
HALES ALAN D.;HILL ANTHONY M. |
分类号 |
G11C5/00;(IPC1-7):G06F15/177 |
主分类号 |
G11C5/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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