| 摘要 |
A stacked semiconductor package including: a first chip; a plurality of first leads of which one side of each of the first leads is attached to the first chip by an insulating adhesive member and electrically connected to the first chip; a first molding compound for sealing the first chip and the first leads, including holes for exposing a predetermined portion of each of the plurality of the first leads, and the first molding compound does not cover a side of the first leads opposite the holes; a first conductive portion formed within the holes included in the first molding compound; an external terminal electrically connected to the first conductive portion; a second chip; a plurality of second leads attached on the second chip by the insulating adhesive member, and being electrically connected to the second chip; a second molding compound for sealing the second chip and the second leads, and exposing a predetermined portion of the second leads; a plurality of conductive connection units for electrically connecting the exposed predetermined portion of the second leads and the side of the first leads not covered by the first molding compound; and a heat sink attached between the first molding compound and the second molding compound, connected to the plurality of conductive connection units, and having a side exposed outwardly. The stacked chip-size semiconductor package is capable of performing a molding process and a stacking process by a strip unit thereby enhancing productivity, and capable of attaching a heat sink in a strip form thereby enhancing heat releasing capacity.
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