发明名称 |
ADAPTIVE VARIABLE FREQUENCY CLOCK SYSTEM FOR HIGH PERFORMANCE LOW POWER MICROPROCESSORS |
摘要 |
A method for dynamically varying a clock frequency in a processor. The method of one embodiment comprises driving a clock distribution network with a clock output from a phased locked loop (PLL). An adjustable clock generator is locked with the phased locked loop. The adjustable clock generator is substituted for the PLL on the clock distribution network.
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申请公布号 |
US2003201838(A1) |
申请公布日期 |
2003.10.30 |
申请号 |
US20030456660 |
申请日期 |
2003.06.06 |
申请人 |
TAM SIMON M.;RUSU STEFAN |
发明人 |
TAM SIMON M.;RUSU STEFAN |
分类号 |
G06F1/32;H03L7/06;(IPC1-7):H03B1/00 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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