发明名称 Input/output characterization register (chain) for an integrated circuit
摘要 An input/output characterization register (10) is provided for characterizing an integrated circuit input or output. The register includes a normal data input (18), a characterization data input (20), and a data latch (30) having a latch control input (40), a latch data input (41) and a latch data output (42). The normal data input and the characterization data input are multiplexed with the latch data output to the latch data input. <IMAGE>
申请公布号 EP1357388(A2) 申请公布日期 2003.10.29
申请号 EP20030007945 申请日期 2003.04.09
申请人 LSI LOGIC CORPORATION 发明人 KORGER, PETER;SCHONER, BRIAN
分类号 G01R31/28;G01R31/3185;G06F11/22;H03K19/0175;(IPC1-7):G01R31/318 主分类号 G01R31/28
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