发明名称 Object addresed memory hierarchy
摘要 A computer system including a processor (26), an object cache (30) operatively connected to the processor (26), a memory (38), and a translator (36) interposed between the object cache (30) and the memory (38), wherein the translator (36) maps an object address to a physical address within the memory (38).
申请公布号 GB2387939(A) 申请公布日期 2003.10.29
申请号 GB20030001150 申请日期 2003.01.17
申请人 * SUN MICROSYSTEMS, INC. 发明人 GREGORY M * WRIGHT;MARIO I * WOLCZKO;MATTHEW L * SEIDL
分类号 G06F12/08;G06F12/10;(IPC1-7):G06F12/08 主分类号 G06F12/08
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