发明名称 Cache control system
摘要 A cache memory unit that preferentially stores specific lines at the cache memory, according to the program nature, dynamically changes the priority ranks of lines, and increases the cache memory hit rate. For this purpose, the lines to be accessed by a processor are divided into groups and definitions of the groups are set in a group definition table; a policy by which to store lines belonging to the groups into the cache memory is set in a policy table; and storing lines into the cache memory is executed, according to the group definitions and the policy of storing set in the tables.
申请公布号 US6640286(B2) 申请公布日期 2003.10.28
申请号 US20010810549 申请日期 2001.03.19
申请人 HITACHI, LTD. 发明人 KAWAMOTO SHINICHI;HIGUCHI TATSUO;HAMANAKA NAOKI
分类号 G06F12/08;G06F12/12;(IPC1-7):G06F12/08 主分类号 G06F12/08
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