| 摘要 |
PROBLEM TO BE SOLVED: To provide a bipolar transistor for reducing a chip area by simultaneously reducing collector resistance Rc and a capacity Csub between collector substrates by only adding 1PR and suppressing a separation distance between adjacent bipolar transistors to a minimum, and to provide its manufacturing method. SOLUTION: The capacity Csub between the collector substrates and the collector resistance Rc can be reduced at the same time by opening a collector 14 for being connected to a base dispersion layer area 4, and at the same time forming a collector trench 14' which is a lead-out electrode on a boundary line between a deep trench 3 formed around the base dispersion layer area 4 and an element separation oxidation film 2. In addition, a cell area can be largely reduced by minimizing the separation distance d1 between the adjacent bipolar transistors. Furthermore, a process can be eliminated due to no need for adding PR for forming the collector trench electrode 14'. COPYRIGHT: (C)2004,JPO
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