发明名称 SELF-ALIGNING METHOD FOR FORMING SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS HAVING EMBEDDED SOURCE LINE AND FLOATING GATE, AND MEMORY ARRAY FOAMED BY USING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a self-aligning method for forming a downsized memory cell having a novel structure, and to provide a memory cell array formed by using the same. SOLUTION: The method is for forming an array of floating gate memory cells, each provided with a trench formed in the surface of a semiconductor substrate and with the source and drain regions separated from each other with a channel region formed in between, and the array is formed by using this method. The source region is formed under the trench, and the channel region includes a part which extends along the trench sidewall and a second part horizontally, extending along the substrate surface. The conductive floating gate is positioned adjacent to the first part of the channel region in the trench and is insulated therefrom. The conductive control gate is positioned on the second part of the channel region and is insulated therefrom. The bottom of a conductive material block is positioned adjacent to the floating gate in the trench and is insulated therefrom. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003303908(A) 申请公布日期 2003.10.24
申请号 JP20030087103 申请日期 2003.03.27
申请人 SILICON STORAGE TECHNOLOGY INC 发明人 YAU WEN FU;KIANIAN SOHRAB
分类号 H01L21/8247;H01L27/105;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 H01L21/8247
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