| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device which can be operated with low power source voltage such that write-in speed is not reduced and of which power consumption is low. <P>SOLUTION: At the time of read-out of data, a pseudo ground line VGj provided corresponding to a pair of bit lines BLj, /BLj of memory cells 11<SB>i</SB>,<SB>j</SB>to be read out is connected to ground voltage GND through a transistor 31<SB>j</SB>. Thereby, the bit line BLj (or /BLj) corresponding to a 'L' level is connected to ground voltage GND through an acceleration circuit AC in the memory cells 11<SB>i</SB>,<SB>j</SB>, read-out speed is accelerated. At the time of write-in time of data, a pseudo ground line VGj provided corresponding to the pair of bit lines BLj, /BLj to be written is connected to power source voltage VDD through a transistor 33<SB>j</SB>. Thereby, a current from the bit line BLj (or /BLj) of a 'H' level to the pseudo ground line VGj is prevented, and write-in speed is not reduced. <P>COPYRIGHT: (C)2004,JPO |
