发明名称 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To obtain a semiconductor device employing an SOI substrate in which generation of a leak current dependent on the gate voltage is controlled. SOLUTION: A p-type body region 13, a source region (not shown) and a drain layer 15, a p<SP>+</SP>impurity layer 8 containing p-type impurities of higher concentration than those of the body region 13 and supplying a voltage thereto, and a p<SP>-</SP>impurity layer 24 provided between the body region 13 and the p<SP>+</SP>impurity layer 8 and containing p-type impurities of higher concentration than those of the body region 13 but lower than those of the p<SP>+</SP>impurity layer 8 are provided on an SOI layer 1. A silicide layer 16 is provided on the p<SP>+</SP>impurity layer 8. Since the concentration of p-type impurities in the p<SP>-</SP>impurity layer 24 is higher than that in the body region 13, a depletion layer appearing upon application of a gate voltage does not elongate readily toward the p<SP>+</SP>impurity layer 8. Consequently, crystal defects occurring in the p<SP>+</SP>impurity layer 8 at the time of forming the silicide layer 16 in the depletion layer are not taken in readily. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003303968(A) 申请公布日期 2003.10.24
申请号 JP20020105556 申请日期 2002.04.08
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 WADA ATSUO;YASUI TAKATOSHI
分类号 H01L29/786;(IPC1-7):H01L29/786 主分类号 H01L29/786
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