发明名称 METHOD FOR MANUFACTURING STACKED ELECTRONIC COMPONENT
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a stacked electronic component having a mother laminate which is not easily distorted and with the surroundings of through-holes which are not to easily cracked or chipped during the punching process. SOLUTION: A punching metal (pin) 21 lands on holes 7, from above the upper surface of a mother laminate 5 with a distortion inhibiting film 11 bonded thereto. Through-holes 10 are formed, penetrating through the mother laminate 5, each corresponding to the position of a hole 7, along virtual lines of division 8. The diameter of the through-hole 10 is longer than the shorter sides, but shorter than the longer sides, of the exposed part of the hole 7, and, as the result, the hole 7 and a conductor 9 filling up the hole 7 are separated electrically into two along the direction of the thickness of the mother laminate 5. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003303914(A) 申请公布日期 2003.10.24
申请号 JP20020109686 申请日期 2002.04.11
申请人 MURATA MFG CO LTD 发明人 KUMANO ATSUSHI
分类号 H05K3/40;H01L23/12;H05K3/00;H05K3/46;(IPC1-7):H01L23/12 主分类号 H05K3/40
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