发明名称 INTEGRATED SEMICONDUCTOR CIRCUIT DEVICE AND METHOD FOR MANUFACTURING THE SAME
摘要 <P>PROBLEM TO BE SOLVED: To realize a level-2 gate insulating film process for DRAM, without increasing number of fabrication processes or number of photomasks. <P>SOLUTION: A gate electrode 7A of MISFET forming a memory cell is formed in a memory cell array region of a semiconductor substrate 1, then the substrate 1 is subjected to heat treatment (reoxidation processing). At that time, since the bird's beak of a thick gate insulating film 6' formed on the lower portion of the gate electrode 7A enters in the enter of the gate electrode 7A, there is formed a gate insulating film 6a having a larger thickness than that of a gate insulating film, before reoxidizing immediately under the center of the gate electrode 7A, while since the gate electrode in the peripheral circuit region has a longer gate length than that of the gate electrode 7A in the memory array region, thickness of the gate insulating film immediately under the center of the gate electrode has almost the same thickness as that before reoxidation processing. <P>COPYRIGHT: (C)2004,JPO
申请公布号 JP2003303902(A) 申请公布日期 2003.10.24
申请号 JP20020110628 申请日期 2002.04.12
申请人 HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD;ELPIDA MEMORY INC 发明人 HASHIMOTO CHIEMI;KAWASHIMA YASUHIKO;KAWAKITA KEIZO;SHIGENIWA MASAHIRO;ISHIZUKA HIROYASU;SHIMIZU AKIHIRO
分类号 H01L27/092;H01L21/02;H01L21/336;H01L21/8238;H01L21/8239;H01L21/8242;H01L27/105;H01L27/108;H01L31/0328 主分类号 H01L27/092
代理机构 代理人
主权项
地址