发明名称 CONTROL METHOD FOR SEMICONDUCTOR MEMORY DEVICE, AND SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a control method for a semiconductor memory device and a semiconductor memory device in which a period of pre-charge performed after finish of continuous access operation can be shortened without deteriorating restore-voltage for memory cells and delaying a data access time. SOLUTION: Activated word lines WL0 are non-activated in proper timing during selection of column selection lines CL0,..., CLN after pairs of bit lines (BL0 and /BL0,..., BLN and /BLN) are differential-amplified to a voltage level of full amplitude. That is, a non-activation timeτA can be incorporated in continuous data access operation. Pre-charge operation can be completed by a non-activation timeτB of a sense amplifier and an equalizing timeτC of a pair of bit lines, so that a pre-charge period can be shortened. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003303493(A) 申请公布日期 2003.10.24
申请号 JP20020106344 申请日期 2002.04.09
申请人 FUJITSU LTD;FUJITSU VLSI LTD 发明人 KATO KOJI;KAWAMOTO SATORU
分类号 G11C11/409;G11C7/12;G11C11/407;G11C11/4076;G11C11/408;G11C11/4094;(IPC1-7):G11C11/409 主分类号 G11C11/409
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