发明名称 CHANNEL CONVERSION CONTROL SYSTEM
摘要 PURPOSE:The information of a high-speed circuit is converted with the delay of approximate one sub-frame interval at its maximum, so that the waiting time for switching can be within one sub-channel at its maximum.
申请公布号 JPS5360505(A) 申请公布日期 1978.05.31
申请号 JP19760135743 申请日期 1976.11.11
申请人 FUJITSU LTD;NIPPON TELEGRAPH & TELEPHONE 发明人 SATOU HIROAKI;KOJIMA HIROHITO;ITOU MASAAKI;ARITA TAKEMI
分类号 H04J3/16;H04Q11/04 主分类号 H04J3/16
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