发明名称 |
SYNCHRONIZATION IN A COMMUNICATION SYSTEM |
摘要 |
<p>A packet switched communications system for transmitting synchronous data from a source module (4) to a terminating module (8) over a network comprises plurality of modules (4, 5, 7, 8) interconnected via transmission links (2, 6, 9). Each module operates with a clock of nominal frequency but which is not synchronised with the clocks of the other module(s) and has a single input and one or more outputs where all the outputs are phase locked to each other but are not synchronised with respect to the input. The system includes means (405, 504, Figures 4 and 5) for determining the accumulated phase difference between the input clock and the output clock of each module, and means (5, 7) for transmitting the accumulated phase difference to the terminating module (8) in the network. The received accumulated phase difference at the terminating module (8) is used to lock the output clock at the terminating module to the input clock at the source module.</p> |
申请公布号 |
WO03088595(A2) |
申请公布日期 |
2003.10.23 |
申请号 |
WO2003GB01477 |
申请日期 |
2003.04.03 |
申请人 |
CAMBRIDGE BROADBAND LIMITED;PORTER, JOHN, DAVID;FREEMAN, BENEDICT, RUSSELL |
发明人 |
PORTER, JOHN, DAVID;FREEMAN, BENEDICT, RUSSELL |
分类号 |
H04J3/06;H04L12/54;H04L12/70;H04Q11/04;(IPC1-7):H04L12/56 |
主分类号 |
H04J3/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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