发明名称 Method of fabricating a shallow trench isolation structure
摘要 A method for fabricating STI for semiconductor device. The method includes the following steps. A trench is formed on the semiconductor substrate, a liner oxide is formed on the bottom and sidewall of the trench, and then a liner nitride is formed on the liner oxide. The first oxide layer is deposited in the trench by high density plasma chemical vapor deposition. The first oxide layer is spray-etched to a predetermined depth, wherein the recipe of the spray etching solution is HF/H2SO4=0.3~0.4. A second oxide layer is deposited to fill the trench by high density plasma chemical vapor deposition to form a shallow trench isolation structure.
申请公布号 US2003199151(A1) 申请公布日期 2003.10.23
申请号 US20020268522 申请日期 2002.10.09
申请人 NANYA TECHNOLOGY CORPORATION 发明人 HO TZU-EN;WU CHANG RONG;CHEN YI-NAN
分类号 H01L21/311;H01L21/762;(IPC1-7):H01L21/76;H01L21/302;H01L21/461 主分类号 H01L21/311
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