Direct memory access controller e.g. hyper transport based universal serial bus host controller, generates address data and memory range different from that generated by activity initiator, and reads data using generated address

摘要

An activity initiator (250) determines data to be fetched from memory, and outputs address data identifying the memory range of data to be fetched. A boundary aligner (245) generates an address data and identifies corresponding memory range, which are different from initiated address data and memory range. A read request generator (230) reads the data using address generated by the boundary aligner. Independent claims are also included for the following: (1) universal serial bus (USB) host controller; and (2) direct memory access (DMA) engine operating method.