| 摘要 |
A comparator circuit comprises an input stage (1) including a pair of inputs for receiving a differential input voltage and a pair of outputs for outputting a differential output current proportional to the differential input voltage. The differential output current is amplified by a transistor output stage (2). According to the present invention a voltage swing at the internal node(s) of a transistor output stage in a comparator is limited (M7,M8). As a result, the comparator response time is reduced and independent from the variation in the supply voltage. <IMAGE>
|
