发明名称 CHIP SCALE PACKAGE AND FABRICATING METHOD THEREOF
摘要 PURPOSE: A chip scale package is provided to prevent a delamination phenomenon between a film substrate and an encapsulation material by eliminating the film substrate after a package is completed, and to easily increase the number of signal input/output pins by arranging the signal input/output pins in two rows. CONSTITUTION: Bonding pads(22) are arranged on the edge of the upper surface of a semiconductor chip(21). The semiconductor chip is attached to adhesive(32). Metal patterns(24) are disposed in each position corresponding to the bonding pads of the semiconductor chip. The signal input/output pins(25) are formed on the bottom of each metal pattern, penetrating the adhesive. Several gold wires(26) bond the bonding pads of the semiconductor chip to the metal patterns, respectively. Encapsulant(27) encapsulates the upper surface of the adhesive including the semiconductor chip, the gold wire and the metal pattern.
申请公布号 KR20030082177(A) 申请公布日期 2003.10.22
申请号 KR20020020784 申请日期 2002.04.17
申请人 CHIPPAC KOREA CO., LTD. 发明人 KIM, HYEONG CHAN;LEE, GU HONG;LEE, HUN TAEK;YOON, IN SANG;LEE, JAE SEUNG
分类号 H01L23/28;(IPC1-7):H01L23/28 主分类号 H01L23/28
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