| 摘要 |
The integrated allocation/de-allocation circuit of the buffer memory, in response to an allocation request of a certain buffer size, allocates sufficient address blocks and memory blocks for the buffer. In response to de-allocation requests, whole unused address and memory blocks are de-allocated. Also the address translator comprises an indirection memory to store the data for translating address data to memory address data. Also the allocation circuit includes an address block detector for tracking the status of blocks and also the next free memory block. The circuit could include a counter which increments the start address for addressing the indirection memory to store the memory address data of the next free memory blocks. Also, in response to a de-allocation request, the counter increments the start address for addressing the indirection memory to retrieve stored memory address data for the memory block allocation hardware to change the status of the memory blocks to free. Also the least significant bits of the address data, representing addressing of the buffer memory within a block, bypass the address translator to address the buffer memory. |
