发明名称 |
Gate voltage limiting for a circuit arrangement |
摘要 |
The circuit has power semiconducting components in the form of switching transistors, pref. IGBTs, and a gate controller suitable for parallel connection. The controller has separate gate resistances (Ron,Roff) for switching on and off and separate auxiliary emitter resistances (RE) for each power switch to achieve a short circuit protected operating mode. The driver circuit earth connection is connected to the summing point of the auxiliary emitter resistances. A diode is connected in series with the gate resistance with its cathode towards the gate resistance. A clamping diode such as a Schottky diode is connected in parallel with each emitter resistance with its cathode towards the emitter. A drain diode is connected to each gate with its cathode towards the gate supply voltage. |
申请公布号 |
EP0818889(B1) |
申请公布日期 |
2003.10.22 |
申请号 |
EP19970111420 |
申请日期 |
1997.07.07 |
申请人 |
SEMIKRON ELEKTRONIK GMBH |
发明人 |
MOURICK, PAUL, DR.;SCHREIBER, DEJAN;ANDERLOHR, ERIK |
分类号 |
H02H7/12;H02M1/08;H02M3/00;H03K17/00;H03K17/08;H03K17/0812;H03K17/12 |
主分类号 |
H02H7/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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